The United States Department of Homeland Security’s US-CERT has issued an alert to warn on cryptographic weaknesses impacting the IEEE P1735 standard, which describes methods for encrypting electronic-design intellectual property and the management of access rights for such IP.
The P1735 IEEE standard is used to ensure confidentiality and access control for the design of complex electronics design intellectual property (IP), where multiple IP owners are usually involved. Newly discovered weaknesses, however, reveal that the standard recommends poor cryptographic choices and is vague or silent on security critical decisions.
The methods described in said Institute of Electrical and Electronics Engineers (IEEE) standard are flawed and enable an attacker to recover the entire underlying plaintext IP, United States Computer Emergency Readiness Team (US-CERT) warns.
Because of these flaws, “implementations of IEEE P1735 may be weak to cryptographic attacks that allow an attacker to obtain plaintext intellectual property without the key, among other impacts,” an alert issued on Friday reads.
Some of the attack vectors that said flaws enable are well-known, such as padding-oracle attacks, but others are new, created by the need to support the typical uses of the underlying IP, “in particular, the need for commercial electronic design automation (EDA) tools to synthesize multiple pieces of IP into a fully specified chip design and to provide HDL syntax errors,” the alert reads.
According to US-CERT, an attacker leveraging the commercial EDA tool as a black-box oracle can exploit these vulnerabilities. The attacker would not only be able to recover entire plaintext IP, but also to “produce standard-compliant ciphertexts of IP that have been modified to include targeted hardware Trojans.”
The weaknesses in the P1735 standard are tracked as CVE-2017-13091 (improperly specified padding in CBC mode allows use of an EDA tool as a decryption oracle), CVE-2017-13092 (improperly specified HDL syntax allows use of an EDA tool as a decryption oracle), CVE-2017-13093 (modification of encrypted IP cyphertext to insert hardware Trojans), CVE-2017-13094 (modification of the encryption key and insertion of hardware Trojans in any IP), CVE-2017-13095 (modification of a license-deny response to a license grant), CVE-2017-13096 (modification of Rights Block to get rid of or relax access control), and CVE-2017-13097 (modification of Rights Block to get rid of or relax license requirement).
The issues are detailed in a research paper titled “Standardizing Bad Cryptographic Practice” (PDF), which was published at the end of September 2017. The paper also provides details on the impact of these security issues.
“An adversary can recover electronic design IPs encrypted using the P1735 workflow, resulting in IP theft and/or analysis of security critical features, as well as the ability to insert hardware Trojans into an encrypted IP without the knowledge of the IP owner. Impacts may include loss of profit and reputation of the IP owners as well as integrated circuits (ICs) with Trojans that contain backdoors, perform poorly, or even fail completely,” US-CERT notes.
To resolve the issue, DHS suggests that developers of EDA software apply the fixes detailed in the researcher’s paper. Users are advised to apply any update the vendor releases for their EDA software.
Impacted vendors include AMD, Cadence Design Systems, Cisco, IBM, Intel, Marvell, Mentor Graphics, National Instruments (NI), National Semiconductor Corporation, NXP Semiconductors Inc., Qualcomm, Samsung, Synopsys, Xilinx, and Zuken Inc.
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